Test-aware, process-aware design for manufacturing of integrated circuits

Lead University: Carnegie Mellon University
PI: C. Fred Higgs, III, Mechanical Engineering
Co-PI(s): Shawn Blanton, Electrical and Computer Engineering

The relentless scaling of semiconductor integrated circuits (IC) and the move to next-generation IC materials such as carbon nanotubes and graphene pose formidable challenges to the IC manufacturing community. As the IC manufacturing process becomes more and more complex, its interaction with the design becomes much less predictable. As a result, certain IC layout features are more difficult to manufacture than others and thus have an increased likelihood of failure. Unlike random defects caused by clean-room contamination, defects due to design-process interactions are “systematic” in nature. The IC manufacturing processes, such as lithography, electrodeposition, and chemical mechanical polishing (CMP) are required to achieve nanofabrication but introduce systematic defects on various ICs. Currently, IC defects are mitigated by one-way communication from the manufacturing and process level back up to the IC design level in the form of design rules or constraints. The complexity of this leads to overly conservative IC designs and shifts some of the burden to innovate and improve away from the manufacturing level. Thus, we propose to develop a “process-aware”, “test-aware” design analysis methodology for identifying IC design features that are susceptible to process-induced failure while also identifying which design feature are likely to fail due to the manufacturing process.

Therefore, the overall goal of the proposed work is to assemble researchers from the Carnegie Mellon’s ECE and ME departments and a Pennsylvania company— PDF Solutions— to research and develop a computational framework that leverages advanced IC test methodologies to identify design features that will not sufficiently yield. This approach aims to diagnose the cause of IC failure, to find the threedimensional location of the failure, and to uncover actionable information as to which design features are adversely affected by the process, in a way that may lead to IC failure. Not only does this work offer breakthrough improvements in IC design and manufacturing, it will enable several PA companies to improve their technical capabilities and ultimately product and/or service offerings.